主級矽晶圓
器件級主級矽晶圓 — 半導體製造的最高品質分類。CZ和FZ生長方法，亞奈米級表面粗糙度，嚴格的電阻率和厚度公差。100mm–300mm直徑，用於CMOS、MEMS、功率器件和先進封裝線。
元件級主級矽晶圓
主級矽晶圓是 SEMI M1–M13 標準體系中單晶矽基板的最高品質分類。每片主級晶圓皆由超純多晶矽原料（9N–11N 純度）製成，並經過嚴格的晶體生長、切片、化學機械拋光與清洗製程，以滿足半導體元件製造所要求的潔淨度、平坦度與晶體完美度。
全球主級矽晶圓市場年出貨額已突破120 億美元，主要受到資料中心、智慧型手機、汽車電動化與 IoT 邊緣裝置對邏輯、記憶體、功率及類比 IC 的持續需求所推動。在先進 CMOS 節點（sub-5nm），單片主級晶圓必須將 0.2μm 的微粒數維持在 10 以下，並將表面粗糙度控制在 0.2nm RMS 以下 — 這些規格要求對製造供應鏈的每一個環節進行極致的管控。
在 GINECHIP，我們供應以 CZ、MCZ 與 FZ 方法生長、涵蓋 100mm 至 300mm 所有標準直徑的元件級主級晶圓。每個批次均附完整分析證書（CoA），依 SEMI 與 ASTM 標準記載電阻率、厚度、TTV、弓形、翹曲、表面粗糙度、微粒數與氧／碳含量。無 COP 的氬氣退火選項、背面多晶矽吸雜與客製偏切晶向可依需求提供。
晶體生長方法
三種不同的單晶生長技術可生產主級矽晶圓，各自針對不同的元件性能需求進行優化。選擇正確的生長方法是基板規格制定中最具影響力的單一決策。
CZ (Czochralski)
Melt-growth from a crucible — industry standard
The workhorse of the semiconductor industry. A single-crystal seed is dipped into molten silicon and slowly pulled upward while rotating, producing ingots up to 300mm diameter and 2m+ length. High throughput, moderate oxygen content (12–18 ppma), and excellent cost efficiency for CMOS, logic, memory, and MEMS applications.
MCZ (Magnetic CZ)
Magnetic-field-stabilized Czochralski growth
CZ growth with a strong horizontal magnetic field applied to the melt. The Lorentz force suppresses thermal convection, reducing oxygen incorporation by 30–50% and dramatically improving resistivity radial uniformity. Preferred for power semiconductors (IGBTs, MOSFETs) where precise oxygen control governs lifetime-killer behavior and for high-resistivity substrates used in RFICs.
FZ (Float Zone)
Crucible-free zone-refining — ultimate purity
A molten zone passes along a polycrystalline rod under RF induction in vacuum or inert gas, refining the silicon to extreme purity levels. No crucible contact means carbon and oxygen are below IR detection limits (＜ 0.1 ppma). Achieves the highest resistivity (up to 10,000+ Ω·cm) and longest minority carrier lifetimes (＞ 1,000 μs). Essential for high-voltage discrete power devices, photodiodes, RF substrates, and terahertz optics.
等級比較：CZ 對 MCZ 對 FZ
CZ、MCZ 與 FZ 基板之間的選擇取決於目標元件對氧含量、電阻率範圍、缺陷密度與成本敏感度的要求。下表概述關鍵的差異化因素。
CZ（柴氏法）
石英坩堝中的標準熔體生長。適中的氧含量（12–18 ppma）可對金屬污染物提供有益的內部吸雜。在所有直徑（最高 300mm）皆具經濟性。
MCZ（磁場柴氏法）
磁場可抑制熔體對流，使氧含量降低 30–50% 並改善徑向電阻率均勻度。最適合需要控制氧含量的功率半導體。
FZ（浮區法）
無坩堝生長，雜質濃度低於紅外偵測極限。最高電阻率（＞ 10 kΩ·cm）、最長載子壽命（＞ 1,000 μs）與最低氧含量（＜ 0.1 ppma）。
無 COP 與退火主級晶圓
晶體原生微粒（COPs）是 CZ 晶體生長過程中形成的奈米級空洞聚集體 — 直徑介於 30nm 至 200nm 之間。當這些空洞與拋光晶圓表面相交時，在雷射檢測中會呈現為與真實表面微粒無法區分的光散射事件，造成錯誤的缺陷計數，進而降低先進 CMOS 製程中的閘極氧化層完整性（GOI）良率。
為了解決此問題，GINECHIP 依據 SEMI M78 提供氬氣退火主級晶圓。在氬氣或氫氣環境中進行高溫退火（≥ 1,200°C），可溶解近表面區域（通常為 3–10μm 深度）的 COPs，形成無 COP 的潔淨區，同時保留晶圓深處的塊狀氧析出物以供內部吸雜。對於在 sub-28nm 技術節點需要閘極氧化層厚度低於 3nm 的元件層而言，此處理至關重要。
技術規格
| 參數 | 可用範圍／數值 |
|---|---|
| Growth Method | CZ (Czochralski), FZ (Float Zone), MCZ (Magnetic CZ) |
| Diameter | 100mm (4″), 125mm (5″), 150mm (6″), 200mm (8″), 300mm (12″) |
| Dopant Type | N-type (Phosphorus, Arsenic, Antimony) / P-type (Boron) |
| Resistivity Range | 0.001 – 10,000 Ω·cm (application-dependent) |
| Crystal Orientation | 〈100〉, 〈111〉, 〈110〉 (off-cut ±0.5° to ±4° on request) |
| Oxygen Content | 12 – 18 ppma (ASTM F121-80), tailored for internal gettering |
| Carbon Content | ≤ 0.1 ppma (ASTM F1319), ultra-low for power devices |
| Thickness Range | 200μm – 1,000μm+ (SEMI M1–M13 standard thicknesses) |
| Thickness Tolerance | ±5μm (200mm), ±10μm (300mm), ±15μm (smaller diameters) |
| TTV (Total Thickness Variation) | ≤ 2μm (200mm), ≤ 3μm (300mm, GBIR per SEMI M1) |
| Bow / Warp | ≤ 20μm Bow, ≤ 25μm Warp (200mm); ≤ 30μm Bow, ≤ 40μm Warp (300mm) |
| Surface Roughness (AFM RMS) | ＜ 0.2nm (1×1μm scan) — Epi-Ready finish |
| Polish Type | SSP (Single-Side Polished) / DSP (Double-Side Polished) |
| Edge Profile | SEMI standard: Round, T-Edge, or E-Edge per diameter |
| Particles @ 0.2μm | ≤ 10 particles (SEMI M53, laser surface scan) |
| COP-Free Option | Argon or Hydrogen annealed — near-zero COPs in near-surface region |
| Backside Treatment | Etched, polished, or poly-silicon back-seal for gettering |
| Laser Mark | SEMI M12/M13 compliant: soft-mark on front or back side |
| Flat / Notch | Per SEMI M1: primary/secondary flats or single notch (200mm/300mm) |
| Warp Control | Edge-Grip or conventional polishing for ultra-flat requirements |
| Packaging | Class 100 cleanroom vacuum-sealed cassette or single-wafer shippers |
| Compliance | SEMI M1–M13, SEMI M53, RoHS, REACH |
應用與市場區隔
CMOS Logic & Memory
The backbone of the USD 550B semiconductor industry. Prime CZ wafers serve as starting substrates for microprocessors, DRAM, NAND flash, and SoCs at nodes from 180nm to sub-3nm. Tight particle and surface specifications ensure photolithography yield at advanced nodes.
MEMS & Sensors
Micro-electromechanical systems rely on precisely specified CZ wafers for inertial sensors (accelerometers, gyroscopes), pressure sensors, microphones, and micro-mirrors. DSP wafers with controlled TTV are critical for DRIE etch-through processes and wafer-bonding compatibility.
Power Devices
IGBTs, super-junction MOSFETs, SiC-on-Si epitaxy, and high-voltage diodes demand FZ wafers with resistivity exceeding 1,000 Ω·cm and ultra-low oxygen. MCZ substrates provide the controlled oxygen environment required for optimal lifetime engineering in high-speed power switches.
CMOS Image Sensors (CIS)
Prime wafers with epitaxial silicon layers on heavily-doped substrates provide the gettering capacity and low dark-current characteristics essential for smartphone, automotive, and industrial image sensors. Epi-ready surface quality with sub-0.2nm RMS roughness ensures defect-free epitaxial growth.
Analog / Mixed-Signal
Precision analog ICs — operational amplifiers, ADCs, DACs, voltage references — require wafers with tight resistivity tolerance and minimal dopant striations. FZ substrates with exceptional radial uniformity are preferred for high-performance analog where matching is critical.
Silicon Photonics & Optics
FZ high-resistivity silicon provides the low-loss, low-dispersion optical medium for silicon photonic integrated circuits operating from 1.1μm to 6μm. CZ wafers are used for wafer-level optics, diffractive elements, and structured surfaces in consumer and industrial photonics.
計量與品質保證
每個主級晶圓批次均在 ISO 9001:2015 認證廠區透過多技術計量方案進行表徵。每次出貨均附完整分析證書（CoA），記載所有量測參數。