CPO — Co-Packaged Optics
Integrating optical engines directly with switch ASICs on a common substrate to eliminate PCB bandwidth bottlenecks, reducing power by 30–50% while scaling interconnect density to Tbps/mm.
概述
Co-Packaged Optics (CPO) is a transformative approach that co-packages the optical engine (lasers, modulators, photodetectors) directly alongside the switch ASIC on a common substrate. By eliminating the long electrical traces on traditional PCBs, CPO dramatically reduces the power consumption of high-speed electrical I/O — the dominant power bottleneck in modern data center switches — while simultaneously increasing bandwidth density to Tbps/mm levels.
As data center networks scale to 51.2T and beyond, the power and signal integrity limits of pluggable optics become unsustainable. CPO is the industry's answer, moving the optical-to-electrical conversion as close as possible to the compute silicon. This requires specialized substrates — silicon photonics (SiPh) SOI, InP for lasers, and LiNbO₃ for high-speed modulators — that GINECHIP supplies with the precision and quality demanded by photonic integrated circuit (PIC) manufacturing.
Key Technology Features
Silicon Photonics Integration
SOI wafers with precisely controlled BOX layer thickness (0.5–3μm) serve as the photonic platform. The high-index-contrast silicon waveguide enables compact, low-loss optical routing and wavelength-division multiplexing (WDM) on a single chip.
InP Laser Integration
Indium Phosphide (InP) remains the material of choice for semiconductor lasers in the O-band and C-band. GINECHIP supplies InP epitaxial wafers with precisely controlled layer composition for DFB lasers, EMLs, and SOAs used in CPO light sources.
LiNbO₃ High-Speed Modulators
Thin-film lithium niobate (TFLN) on insulator enables electro-optic modulators with bandwidth exceeding 100 GHz and ultra-low Vπ. These modulators are essential for the high-speed optical I/O channels in CPO architectures.
Co-Packaging Assembly
CPO assembly requires precision die attach, low-loss optical coupling (edge or grating couplers), and hermetic or near-hermetic packaging. The substrate must maintain dimensional stability through multiple thermal cycles, a key advantage of glass and silicon interposers.
GINECHIP Solutions
SOI wafers with custom BOX thickness (0.5–3μm) and device layer thickness for silicon photonics, with surface roughness <0.2nm RMS for low-loss waveguides.
Indium Phosphide substrates and epitaxial structures for laser diodes, photodetectors, and semiconductor optical amplifiers in the O-band and C-band.
Lithium niobate on insulator (LNOI) wafers for high-speed electro-optic modulators, with film thickness from 300nm to 1μm on silicon or quartz carriers.
CMP polishing services achieving sub-nanometer surface roughness for optical-quality surfaces, essential for low-loss optical coupling and waveguide fabrication.
Target Applications
CPO is primarily targeted at hyperscale data center switches (51.2T and beyond), AI/ML cluster interconnects, and high-performance computing fabrics. Emerging applications include optical I/O for chip-to-chip communication in multi-die packages and optical interconnects for disaggregated computing architectures.