基板 · 材料
鍍膜基板
帶有熱氧化層、LPCVD氮化物、金屬薄膜和介質疊層的預鍍膜晶圓。
Thermal Oxide · PECVD · LPCVD · ALD · Sputter沉積方法
SiO₂ · Si₃N₄ · Poly-Si · Al · Au · Pt · DBR薄膜類型
10nm–10μm厚度範圍
Si · Glass · GaAs · InP · Flexible基板選項
概述
鍍膜基板是許多半導體和MEMS器件的關鍵基礎。GINECHIP提供全面的預鍍膜晶圓基板服務，包括熱氧化層、LPCVD/PECVD氮化物、多晶矽、金屬薄膜和介質多層膜，可在矽、玻璃和化合物半導體基板上實現客製化薄膜疊層。
我們提供業界領先的品質和精度，每片鍍膜基板都經過嚴格的品質控制和完整的材料認證。
可用的鍍膜類型
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- Dry: 10nm–300nm, Wet: 100nm–2μm
- Uniformity: ±2% within-wafer
- Refractive index: 1.46 @ 633nm
- Breakdown field: > 10 MV/cm
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- Thickness: 50nm–2μm
- Stress: < 100 MPa (low-stress nitride)
- Refractive index: 2.0 @ 633nm
- Etch selectivity to Si: > 500:1 in KOH
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- Thickness: 100nm–10μm
- Resistivity: 0.001–1000 Ω·cm (doped)
- As-deposited or annealed (stress control)
- Grain size: 20–100nm (deposition condition)
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- Al: 100nm–5μm (wirebonding)
- Ti/Au: 20/200nm–50/1000nm
- Cr/Au, Ti/Pt/Au, Ti/Ni/Au stacks
- Sheet resistance as specified per process
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- SiO₂/TiO₂, SiO₂/Ta₂O₅, SiO₂/Si₃N₄
- 3–50 layer pairs
- Reflectivity > 99.9% at design wavelength
- Custom spectral targets: 400nm–2μm
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- Thickness: 0.5μm–50μm
- Dielectric constant: 2.65–3.15
- USP Class VI biocompatible
- No pinholes, true conformal coverage
相容基板
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沉積技術
熱氧化
- Dry oxidation (O₂): Highest quality SiO₂ for gate dielectrics, 10nm–300nm
- Wet oxidation (H₂O vapor): Higher growth rate for thicker oxides, 100nm–2μm
- Chlorinated oxidation (TCA/TCE): Enhanced minority carrier lifetime for power devices
- Available on 100mm, 150mm, and 200mm Si wafers
LPCVD
- Si₃N₄: Low-stress recipe (< 100 MPa) for MEMS membranes
- Polysilicon: Doped or undoped, tunable grain size and stress
- TEOS SiO₂: Conformal oxide with excellent step coverage
- Batch processing for cost efficiency at volume
PECVD
- SiO₂: Low-temperature (< 400°C) oxide for post-metallization passivation
- Si₃N₄: Dielectric passivation with tunable stress (compressive to tensile)
- SiON, a-Si: Anti-reflection coatings, absorber layers
- High deposition rate, compatible with temperature-sensitive substrates
PVD
- DC/RF Magnetron Sputtering: Al, Ti, Au, Pt, Cr, Ni, Cu, ITO
- E-beam / Thermal Evaporation: High-purity metal films for lift-off processes
- Reactive Sputtering: TiN, TaN barrier/adhesion layers
- Shadow mask or full-wafer deposition
品質控制
每片鍍膜基板都經過嚴格的品質控制，包括薄膜厚度量測、折射率分析、薄膜應力測試、均勻性驗證、表面缺陷檢測和片電阻量測。
Film Thickness — Spectroscopic ellipsometry or reflectometry (9-point map)
Refractive Index — Measured at 633nm wavelength
Film Stress — Wafer bow measurement pre/post deposition (Stoney equation)
Uniformity — Within-wafer and wafer-to-wafer thickness variation
Sheet Resistance — Four-point probe mapping for conductive films
Surface Defects — Optical inspection for pinholes, particles, and color variations