Low loss at mmWave
tan δ < 0.005 and a dielectric constant near 4.6 — roughly half that of silicon — cut substrate loss in 5G/6G front-end and automotive radar modules.
Technology · Glass Interconnect
TGV — Through-Glass Via
Through-glass vias for glass interposers, mmWave RF modules and hermetic MEMS packaging. Via formation, isolation liner, copper fill and planarization on 100–300mm glass wafers.
AR 6:1–10:1 TGV Aspect Ratio
10–200μm Via Diameter
tan δ < 0.005 Dielectric Loss
100mm–300mm Wafer Diameter
Overview
Glass is taking over the centre of advanced packaging. Its low dielectric constant and loss tangent (tan δ < 0.005) keep insertion loss low at mmWave frequencies, its CTE can be matched to silicon, and it is available in formats far larger than a 300mm wafer — three advantages a silicon interposer cannot offer at the same time. The through-glass via is what turns that material advantage into a working electrical interconnect: a vertical, metal-filled path straight through the glass.
GINECHIP runs the complete TGV flow — via formation, dielectric isolation, barrier and seed deposition, copper fill, overburden removal and redistribution — inside one ISO Class 5 cleanroom. Because the via, the liner and the RDL are engineered as a single stack, interface compatibility between process steps is designed in rather than discovered in qualification.
Why Glass Instead of Silicon
CTE matched to silicon
Borofloat 33 and alkali-free glass grades can be matched to silicon's 2.6 ppm/°C, reducing thermal stress and warpage across large interposers.
Large area, lower cost
Glass is supplied in panels far larger than a 300mm wafer, so cost per unit area falls as interposer size grows — the economics behind panel-level packaging.
Hermetic and transparent
A glass cap seals MEMS cavities hermetically while staying optically transparent — valuable for optical MEMS, pressure sensors and microfluidic devices.
TGV Formation Methods
Laser-Induced Deep Etching (LIDE)
High ARLIDE uses a two-step process: femtosecond laser modification of the glass to create a modified track, followed by wet chemical etching that preferentially removes the laser-modified material. This produces smooth-walled, high-aspect-ratio (up to 10:1) TGVs with minimal micro-cracking and residual stress. The LIDE process is compatible with borosilicate, fused silica, and alkali-free glass substrates from 100mm to 300mm diameter.
AR Up to 10:1
Min Diameter 10μm
Sidewall Ra < 100nm
Throughput ~100 vias/s
Focused Electrical Discharge
High SpeedFocused electrical discharge (also known as electrical discharge machining or spark-assisted chemical engraving) uses a high-voltage discharge between a tool electrode and the glass surface to locally ablate material. This method offers the highest throughput (up to 1,000 vias/second) for via diameters of 50–200μm. Best suited for coarse-pitch TGV interposers where throughput is prioritized over minimum feature size.
AR Up to 3:1
Min Diameter 50μm
Sidewall Ra < 200nm
Throughput ~1,000 vias/s
Ultrashort Pulse Laser Ablation
VersatileDirect femtosecond or picosecond laser ablation of glass without subsequent wet etching. The ultrashort pulse duration (< 1 ps) minimizes heat-affected zone and micro-cracking. This method offers the greatest flexibility in via geometry — tapered, straight, or shaped sidewalls — and is compatible with all glass types. Throughput is lower than LIDE or discharge methods but is suitable for prototyping and low-volume production.
AR Up to 5:1
Min Diameter 20μm
Sidewall Ra < 200nm
Throughput ~10 vias/s
TGV Process Flow
- 01 Via formation
- 02 Isolation liner
- 03 Barrier & seed
- 04 Copper fill
- 05 Overburden removal
- 06 RDL & bumping
- 07 Test & inspection
Technical Specifications
| Parameter | Specification |
|---|---|
| Substrate Material | Borofloat 33 · Fused silica quartz · AN100 alkali-free glass · Sapphire Al₂O₃ |
| Diameter | 100mm (4″) · 150mm (6″) · 200mm (8″) · 300mm (12″) |
| TGV Formation Method | LIDE · Focused electrical discharge · Wet HF etching · Ultrashort-pulse laser ablation |
| Via Diameter | 10μm – 200μm |
| Aspect Ratio | Up to 10:1 (LIDE) · up to 6:1 (laser) · up to 3:1 (wet etch) |
| Via Pitch | 50μm – 500μm |
| Sidewall Roughness | < 200nm Ra (laser) · < 100nm Ra (LIDE) · < 50nm (wet etch + anneal) |
| Isolation Liner | PECVD SiO₂ (100–500nm) · ALD Al₂O₃ (50–100nm) · BCB / SU-8 |
| Metallization | Cu (PVD seed + electroplating) · Ti/Cu · TiW/Cu · Cr/Au · Cu/Ni/Au |
| Via Resistance | < 100 mΩ (typical, 50×500μm via, solid Cu fill) |
Applications
2.5D Glass Interposers
TGV wafers are the core building block of glass interposers for 2.5D packaging. The low dielectric constant (εr = 4.0–5.5) and low loss tangent (tan δ < 0.005) of glass reduce signal attenuation compared to silicon interposers, making them ideal for high-speed digital and RF applications. Multi-layer RDL on both sides of the TGV wafer provides the lateral routing fabric between chiplets, HBM stacks, and package substrates.
mmWave & RF Front-End Modules
The low dielectric loss of glass substrates combined with TGV interconnects enables low-loss RF transitions from antenna to beamforming IC. TGV-based interposers for 5G mmWave (28/39 GHz) and 6G (100+ GHz) antenna-in-package modules achieve insertion loss < 0.5 dB per transition, significantly better than organic substrate-based alternatives.
CoPoS Panel-Level Integration
CoPoS (Chip-on-Panel-on-Substrate) architecture relies on TGV-metallized glass panels as the interposer substrate. The TGVs provide vertical interconnect between the frontside RDL (chip-to-chip routing) and the backside package substrate interface. Panel-level TGV formation on 510×515mm glass panels enables the 4.5× throughput advantage of CoPoS over wafer-level approaches.
Glass Photonic Interposers
TGV wafers with integrated optical waveguides (written by femtosecond laser in fused silica) enable co-integration of electrical interconnects (Cu-filled TGVs) and optical interconnects (waveguides) on a single glass substrate. This is critical for co-packaged optics (CPO) where both electrical and optical signals must be routed between the photonic engine and the switch ASIC.
MEMS Packaging & Interconnects
TGV wafers provide hermetic, low-parasitic electrical feedthroughs for MEMS wafer-level packaging. The electrical insulation of glass (resistivity > 10¹⁰ Ω·cm) eliminates the need for dielectric isolation layers required on silicon TSV wafers, simplifying the fabrication process and reducing parasitic feedthrough capacitance for capacitive MEMS sensors.
Microfluidic & BioMEMS Devices
Through-glass vias in borosilicate or fused silica wafers enable fluidic interconnects between microfluidic layers in lab-on-chip and organ-on-chip devices. The optical transparency of glass allows real-time fluorescence microscopy of the fluidic channels, while the chemical inertness ensures compatibility with biological samples and aggressive reagents.
Designing a TGV Interposer?
Send your glass type, via diameter and pitch, and target panel or wafer size — our process engineers will confirm the achievable aspect ratio and return a quotation within 24 hours.