Wet Dry Etching DRIE | GINECHIP™

DRIE · RIE · KOH · HF VaporStat Etch Tech

AR > 30:1Stat Max AR

500μm+Stat Max Depth

Dry & Wet ProcessesStat Process Range

Overview

Etching is the subtractive patterning process that selectively removes material from a wafer surface — either isotropically (equal rate in all directions) or anisotropically (directionally preferential). GINECHIP operates wet chemical etching, DRIE, RIE, and ICP-RIE platforms to deliver the full spectrum of etch profiles, selectivities, and aspect ratios required by MEMS and semiconductor fabrication.

From KOH anisotropic wet etching for bulk-micromachined MEMS structures (55° sidewall angle in (100) silicon), to Bosch DRIE for high-aspect-ratio TSVs (aspect ratios > 30:1, 200μm+ depth), to ICP-RIE for compound semiconductor etching (GaAs, InP, SiC, GaN) — we match the etch chemistry and plasma conditions to your specific material system and feature geometry.

Etching Technologies

KOH / TMAH Wet Etching

Anisotropic silicon etching with 54.7° sidewall angle in (100) Si. Etch rate: 0.5–2μm/min at 70–90°C. TMAH for CMOS-compatible (no potassium). Membrane release, cavity formation, bulk micromachining.

Etch rate: 2–20μm/min (Si)Aspect ratio: up to 30:1Sidewall: 89° ± 0.5°Scallop: < 50nm (optimized)Depth: up to 500μm+Mask: photoresist or SiO₂

BOE / HF Wet Etching

Isotropic etching of SiO₂ and silicate glasses. Buffered oxide etch (BOE 6:1, 7:1) for controlled rates. HF vapor for stiction-free MEMS release. Sacrificial oxide removal, glass wafer structuring.

Temperature: −100 to −130°CEtch rate: 3–10μm/minSidewall: smooth, no scallopsAspect ratio: up to 20:1Selectivity to SiO₂: up to 100:1Depth: up to 200μm

Bosch DRIE (Deep Reactive Ion Etching)

Cyclic SF₆ etch / C₄F₈ passivation for vertical silicon etching. Aspect ratios > 30:1. Depth 10–500μm. Scallop size < 200nm. Through-wafer vias (TSV), comb-drive MEMS, micro-needles, microfluidic channels.

KOH: 30 wt%, 80°CTMAH: 25 wt%, 80°CSi（100） etch rate: ~1μm/minSi（111）etch stop: < 0.01μm/minSi₃N₄ and SiO₂ hard masksElectrochemical etch-stop option

RIE / ICP-RIE

Fluorine-based (CF₄, CHF₃, SF₆) for Si, SiO₂, Si₃N₄. Chlorine-based (Cl₂, BCl₃) for GaAs, InP, GaN. Argon ion milling for noble metals (Au, Pt). Low-damage ICP-RIE with independent RF/ICP power control.

Etchant: anhydrous HF vaporSelectivity SiO₂:Si > 1000:1No stiction (dry release)Compatible with Al metallizationProcess time: 5–60 minIdeal for inertial sensors

Vapor HF Release Etching

Stiction-free MEMS structure release using vapor HF (vHF). Sacrificial SiO₂ removal without liquid surface tension effects. Compatible with high-aspect-ratio, low-stiffness suspended structures. Cantilever beams, membrane release, micro-bridge structures.

Dielectric: CF₄/CHF₃/Ar chemistryNitride: SF₆ or CF₄/O₂Resist strip: O₂ plasma (ashing)Metal etch: Cl₂/BCl₃ (Al)Ion milling: Ar (Au, Pt, Cr)Etch rate: 10–500nm/min

Metal Etching (Wet & Dry)

Wet chemical etching of Al (H₃PO₄/HNO₃/HAc), Au (KI/I₂), Cr (ceric ammonium nitrate), Ti (dilute HF). Dry etching of Al, TiN, W via chlorine-based ICP-RIE. For metal interconnect patterning and electrode definition.

SiO₂: BOE (6:1, 7:1), HFSi₃N₄: hot H₃PO₄ (160°C)Si isotropic: HNA mixtureAl: H₃PO₄:HNO₃:CH₃COOHAu: KI:I₂ solutionCr: Ce(NH₄)₂(NO₃)₆ based

Typical Applications

MEMS Inertial Sensors

DRIE for high-aspect-ratio comb-drive and proof-mass structures. Vapor HF for stiction-free release. Through-wafer etching for via interconnects. Accelerometers, gyroscopes, resonant sensors.

Through-Silicon Vias (TSV)

Bosch DRIE for high-aspect-ratio through-wafer vias. 10–200μm diameter, 50–500μm depth. Sidewall angle 90° ± 1°. Scallop smoothing post-etch. 3D-IC, interposer, MEMS-CMOS integration.

Microfluidics & BioMEMS

DRIE and KOH etching for microfluidic channels, chambers, and nozzles. Through-wafer ports for fluidic interconnects. Glass etching (BOE/HF) for transparent fluidic devices. Smooth sidewalls for laminar flow.

Power Devices (SiC, GaN)

ICP-RIE etching of SiC (SF₆/O₂ chemistry) for trench MOSFETs. Cl₂/BCl₃/Ar etching of GaN HEMT mesa isolation. High selectivity to Ni/Au hard masks. Schottky diodes, HEMTs, vertical power devices.

Photonics & Waveguides

ICP-RIE for Si₃N₄ and SOI waveguide etching with vertical sidewalls and low sidewall roughness (< 5nm RMS). Shallow trench isolation for photonic circuits. Deep etching for fiber alignment grooves.

Hard Mask & Template Fabrication

Thick DRIE etching of silicon to create reusable nanoimprint lithography stamps and PDMS casting molds. Through-wafer etch for shadow masks and stencil lithography. Precision vertical sidewalls with minimal mask undercut.

Etch Selectivity

Selectivity Paragraph

Etch Metrology & Inspection

Post-etch metrology includes SEM cross-section analysis, optical profilometry for depth and sidewall angle measurement, and optical microscopy for defect inspection. We provide detailed measurement reports with each lot.

Critical Point Drying

Critical Point Drying is used for stiction-free release of high-aspect-ratio MEMS structures. After wet etching, the wafer is transferred through a series of solvent exchanges and dried using supercritical CO₂, eliminating surface tension forces that could cause structure collapse.

Need Etching Services for Your Wafers?

Specify your wafer material, etch depth, feature dimensions, and mask material — our team will respond with a detailed quotation within 24 hours.

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