Coated Substrates
coatedSubstrates.desc
Overview
A comprehensive overview of our capabilities and services.
We deliver industry-leading quality and precision.
Available Coating Types
coatedSubstrates.film1Title
coatedSubstrates.film1Desc
- Dry: 10nm–300nm, Wet: 100nm–2μm
- Uniformity: ±2% within-wafer
- Refractive index: 1.46 @ 633nm
- Breakdown field: > 10 MV/cm
coatedSubstrates.film2Title
coatedSubstrates.film2Desc
- Thickness: 50nm–2μm
- Stress: < 100 MPa (low-stress nitride)
- Refractive index: 2.0 @ 633nm
- Etch selectivity to Si: > 500:1 in KOH
coatedSubstrates.film3Title
coatedSubstrates.film3Desc
- Thickness: 100nm–10μm
- Resistivity: 0.001–1000 Ω·cm (doped)
- As-deposited or annealed (stress control)
- Grain size: 20–100nm (deposition condition)
coatedSubstrates.film4Title
coatedSubstrates.film4Desc
- Al: 100nm–5μm (wirebonding)
- Ti/Au: 20/200nm–50/1000nm
- Cr/Au, Ti/Pt/Au, Ti/Ni/Au stacks
- Sheet resistance as specified per process
coatedSubstrates.film5Title
coatedSubstrates.film5Desc
- SiO₂/TiO₂, SiO₂/Ta₂O₅, SiO₂/Si₃N₄
- 3–50 layer pairs
- Reflectivity > 99.9% at design wavelength
- Custom spectral targets: 400nm–2μm
coatedSubstrates.film6Title
coatedSubstrates.film6Desc
- Thickness: 0.5μm–50μm
- Dielectric constant: 2.65–3.15
- USP Class VI biocompatible
- No pinholes, true conformal coverage
Compatible Substrates
coatedSubstrates.subType1Title
coatedSubstrates.subType1Desc
coatedSubstrates.subType2Title
coatedSubstrates.subType2Desc
coatedSubstrates.subType3Title
coatedSubstrates.subType3Desc
coatedSubstrates.subType4Title
coatedSubstrates.subType4Desc
coatedSubstrates.subType5Title
coatedSubstrates.subType5Desc
coatedSubstrates.subType6Title
coatedSubstrates.subType6Desc
Deposition Technologies
Thermal Oxidation
- Dry oxidation (O₂): Highest quality SiO₂ for gate dielectrics, 10nm–300nm
- Wet oxidation (H₂O vapor): Higher growth rate for thicker oxides, 100nm–2μm
- Chlorinated oxidation (TCA/TCE): Enhanced minority carrier lifetime for power devices
- Available on 100mm, 150mm, and 200mm Si wafers
Lpcvd
- Si₃N₄: Low-stress recipe (< 100 MPa) for MEMS membranes
- Polysilicon: Doped or undoped, tunable grain size and stress
- TEOS SiO₂: Conformal oxide with excellent step coverage
- Batch processing for cost efficiency at volume
Pecvd
- SiO₂: Low-temperature (< 400°C) oxide for post-metallization passivation
- Si₃N₄: Dielectric passivation with tunable stress (compressive to tensile)
- SiON, a-Si: Anti-reflection coatings, absorber layers
- High deposition rate, compatible with temperature-sensitive substrates
Pvd
- DC/RF Magnetron Sputtering: Al, Ti, Au, Pt, Cr, Ni, Cu, ITO
- E-beam / Thermal Evaporation: High-purity metal films for lift-off processes
- Reactive Sputtering: TiN, TaN barrier/adhesion layers
- Shadow mask or full-wafer deposition
Quality Control
Each coated substrate undergoes rigorous quality control including film thickness mapping, uniformity verification, adhesion testing, and surface inspection per SEMI standards.
CTA Title
Contact our engineering team to discuss your specific requirements and receive a detailed quotation within 24 hours.