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Thermal Oxide · PECVD · LPCVD · ALD · SputterDeposition Methods
SiO₂ · Si₃N₄ · Poly-Si · Al · Au · Pt · DBRFilm Types
10nm–10μmThickness Range
Si · Glass · GaAs · InP · FlexibleSubstrate Options

Overview

Coated substrates are a foundational input for a wide range of semiconductor and MEMS devices. GINECHIP provides comprehensive pre-coated wafer substrate services — thermal oxide, LPCVD/PECVD nitride, polysilicon, metal films, and dielectric multilayers — enabling custom film stacks on silicon, glass, and compound semiconductor substrates.

Each coated substrate ships with full film characterization data and material certification. Our deposition equipment spans thermal oxidation furnaces, LPCVD/PECVD reactors, and PVD sputter/evaporation systems, giving us the process flexibility to match tight thickness, stress, and uniformity targets across a wide range of substrate materials.

Available Coating Types

Thermal Oxide (SiO₂)

Dry- and wet-grown silicon dioxide for gate dielectrics, masking, and passivation, with tightly controlled thickness and refractive index.

  • Dry: 10nm–300nm, Wet: 100nm–2μm
  • Uniformity: ±2% within-wafer
  • Refractive index: 1.46 @ 633nm
  • Breakdown field: > 10 MV/cm

Low-Stress Silicon Nitride (Si₃N₄)

LPCVD-deposited nitride with low intrinsic stress and high KOH etch selectivity, ideal for MEMS membranes and diffusion masking.

  • Thickness: 50nm–2μm
  • Stress: < 100 MPa (low-stress nitride)
  • Refractive index: 2.0 @ 633nm
  • Etch selectivity to Si: > 500:1 in KOH

Polysilicon

Doped or undoped polysilicon films with tunable resistivity and grain size for gate electrodes, resistors, and MEMS structural layers.

  • Thickness: 100nm–10μm
  • Resistivity: 0.001–1000 Ω·cm (doped)
  • As-deposited or annealed (stress control)
  • Grain size: 20–100nm (deposition condition)

Metal Films & Stacks

Sputtered or evaporated Al, Au, Pt, and Ni multilayer stacks for wirebonding pads, ohmic contacts, and diffusion barriers.

  • Al: 100nm–5μm (wirebonding)
  • Ti/Au: 20/200nm–50/1000nm
  • Cr/Au, Ti/Pt/Au, Ti/Ni/Au stacks
  • Sheet resistance as specified per process

Distributed Bragg Reflector (DBR) Coatings

Multilayer dielectric stacks of alternating high/low-index materials engineered for greater than 99.9% reflectivity at a target wavelength.

  • SiO₂/TiO₂, SiO₂/Ta₂O₅, SiO₂/Si₃N₄
  • 3–50 layer pairs
  • Reflectivity > 99.9% at design wavelength
  • Custom spectral targets: 400nm–2μm

Parylene Conformal Coating

Pinhole-free, biocompatible parylene deposited by vapor-phase polymerization for hermetic, uniform coverage of complex geometries.

  • Thickness: 0.5μm–50μm
  • Dielectric constant: 2.65–3.15
  • USP Class VI biocompatible
  • No pinholes, true conformal coverage

Compatible Substrates

Silicon Wafers

Prime and test-grade Si wafers from 50mm to 300mm, available in any orientation and resistivity for coating.

Glass Substrates

Borosilicate, fused silica, and display-grade glass substrates for optical, MEMS, and microfluidic applications.

GaAs Substrates

Semi-insulating and n-type gallium arsenide wafers for RF, photonic, and optoelectronic device coating.

InP Substrates

Indium phosphide wafers for photonic and high-frequency device applications requiring precision film deposition.

Flexible & Polymer Substrates

Low-temperature-compatible coating processes for polyimide, PET, and other flexible substrate materials.

Sapphire Substrates

Al₂O₃ substrates coated for LED, optical window, and high-temperature electronic device applications.

Deposition Technologies

Thermal Oxidation

  • Dry oxidation (O₂): Highest quality SiO₂ for gate dielectrics, 10nm–300nm
  • Wet oxidation (H₂O vapor): Higher growth rate for thicker oxides, 100nm–2μm
  • Chlorinated oxidation (TCA/TCE): Enhanced minority carrier lifetime for power devices
  • Available on 100mm, 150mm, and 200mm Si wafers

LPCVD

  • Si₃N₄: Low-stress recipe (< 100 MPa) for MEMS membranes
  • Polysilicon: Doped or undoped, tunable grain size and stress
  • TEOS SiO₂: Conformal oxide with excellent step coverage
  • Batch processing for cost efficiency at volume

PECVD

  • SiO₂: Low-temperature (< 400°C) oxide for post-metallization passivation
  • Si₃N₄: Dielectric passivation with tunable stress (compressive to tensile)
  • SiON, a-Si: Anti-reflection coatings, absorber layers
  • High deposition rate, compatible with temperature-sensitive substrates

PVD

  • DC/RF Magnetron Sputtering: Al, Ti, Au, Pt, Cr, Ni, Cu, ITO
  • E-beam / Thermal Evaporation: High-purity metal films for lift-off processes
  • Reactive Sputtering: TiN, TaN barrier/adhesion layers
  • Shadow mask or full-wafer deposition

Quality Control

Each coated substrate undergoes rigorous quality control including film thickness mapping, uniformity verification, adhesion testing, and surface inspection per SEMI standards.

Film Thickness — Spectroscopic ellipsometry or reflectometry (9-point map)
Refractive Index — Measured at 633nm wavelength
Film Stress — Wafer bow measurement pre/post deposition (Stoney equation)
Uniformity — Within-wafer and wafer-to-wafer thickness variation
Sheet Resistance — Four-point probe mapping for conductive films
Surface Defects — Optical inspection for pinholes, particles, and color variations

Ready to Get Started?

Contact our engineering team to discuss your specific requirements and receive a detailed quotation within 24 hours.

ISO 9001:2015Certification AnalysisProcess Data IncludedCustom Film Stacks