Nitride on Silicon (Si₃N₄)
Silicon wafers with LPCVD or PECVD silicon nitride (Si₃N₄) films — stoichiometric and low-stress formulations from 20nm to 2μm. High dielectric strength, excellent diffusion barrier, and selective etch properties for MEMS, passivation, and hard mask applications. Wafer-scale ellipsometry and stress measurement included.
What Is Silicon Nitride on Silicon?
Silicon nitride (Si₃N₄) is a dense, chemically inert dielectric film deposited on silicon wafers by chemical vapor deposition (CVD). Unlike thermal SiO₂, which grows by consuming the substrate, Si₃N₄ is a deposited film — enabling independent control of thickness, composition, and stress. Its exceptional properties — diffusion barrier effectiveness, high dielectric strength, selective etch resistance, and tunable mechanical stress — make it the most versatile dielectric in silicon processing after SiO₂.
The two dominant deposition pathways serve distinct applications: LPCVD (Low-Pressure CVD) at ~820°C produces dense, stoichiometric Si₃N₄ with the highest chemical resistance and lowest hydrogen content — ideal for MEMS structural layers and KOH hard masks. PECVD (Plasma-Enhanced CVD) at 250–400°C enables deposition over temperature-sensitive structures (post-metallization passivation) with higher deposition rates and tunable compressive-to-tensile stress via RF power and gas ratio adjustments.
GINECHIP supplies LPCVD and PECVD silicon nitride wafers in stoichiometric (n ≈ 2.0) and low-stress Si-rich (n ≈ 2.2–2.4) formulations. All lots include ellipsometry thickness and refractive index mapping, wafer curvature stress measurement, and BOE etch rate verification. ISO 9001:2015 certified deposition facilities with full traceability.
LPCVD vs. PECVD Silicon Nitride
Choosing between LPCVD and PECVD nitride involves fundamental trade-offs between film quality, thermal budget, and mechanical stress. The table below provides a comprehensive comparison to guide process selection.
| Property | LPCVD (DCS/NH₃) | PECVD (SiH₄/NH₃) |
|---|---|---|
| Deposition Temperature | 780–850°C (typically 820°C) | 250–400°C |
| Film Density | 3.1 g/cm³ (near bulk Si₃N₄) | 2.4–2.8 g/cm³ (less dense) |
| Refractive Index | 2.00 ± 0.02 (stoichiometric) | 1.90–2.10 (varies with SiH₄/NH₃ ratio) |
| Film Stress (stoichiometric) | 800–1200 MPa tensile | –200 to +200 MPa (tunable compressive to tensile) |
| Low-Stress Formulation | < 50 MPa tensile (Si-rich, n ≈ 2.2–2.4) | < 100 MPa (low-RF dual-frequency) |
| Within-Wafer Uniformity | ±2% (horizontal furnace) | ±3–5% (parallel-plate or ICP reactor) |
| Hydrogen Content | 1–3 at% (Si–H, N–H bonds) | 10–25 at% (high Si–H, N–H incorporation) |
| Etch Rate (5:1 BHF, 25°C) | 0.5–1.5 nm/min (very low) | 20–200 nm/min (varies with density) |
| KOH Etch Selectivity (Si:Si₃N₄) | >1000:1 (excellent mask) | 10:1 – 100:1 (porous, poor mask) |
| HF Resistance | Excellent (near-immune to dilute HF) | Poor to moderate |
| Step Coverage / Conformality | >95% (excellent conformality) | 60–85% (moderate, sidewall thinner) |
| Deposition Rate | 3–5 nm/min | 50–200 nm/min |
| Wafer Bow Impact | Significant for thick films (>200nm) | Manageable (low-T, stress-tunable) |
| Best For | MEMS, hard masks, diffusion barriers, CMP stops | Passivation, inter-metal dielectric, low-T encapsulation |
Si₃N₄/Si Material Stack Architecture
Deposited silicon nitride film. Dense, chemically inert, excellent diffusion barrier. Available in stoichiometric (n=2.0) for maximum chemical resistance or Si-rich (n=2.2–2.4) for controlled low tensile stress.
Single-crystal silicon substrate in all standard diameters and orientations. For double-side polished wafers, nitride can be deposited on both sides to balance stress and minimize wafer bow.
Film Stress Engineering in Silicon Nitride
Controlling mechanical stress in Si₃N₄ films is critical for MEMS structural integrity, crack prevention in thick films, and wafer bow management for lithography overlay. Stoichiometric LPCVD Si₃N₄ is inherently highly tensile (800–1200 MPa), which can cause cracking in films thicker than ~200nm on bare silicon. GINECHIP offers two stress-control strategies:
Si-Rich LPCVD Nitride
Increasing the DCS:NH₃ gas ratio during LPCVD produces silicon-rich SiNx films with refractive index 2.2–2.4 and tensile stress reduced to < 50 MPa. This is the industry-standard approach for MEMS membranes and cantilevers where flatness is paramount.
Dual-Frequency PECVD
In PECVD, compressive stress from ion bombardment (HF power) can be balanced against tensile stress from film shrinkage (LF power). Dual-frequency reactors allow independent control of ion energy and radical flux, yielding < 100 MPa films at 300–400°C.
Stress-Relief Anneal
Post-deposition rapid thermal annealing (RTA) at 1000–1100°C in N₂ ambient can partially relieve tensile stress in LPCVD nitride through viscous flow and hydrogen desorption. Typically reduces stress by 30–50% from as-deposited values.
Applications & Market Segments
MEMS Membranes & Structures
Low-stress LPCVD Si₃N₄ as free-standing membranes for pressure sensors, microphones, micro-hotplates, and AFM cantilevers. Stress-controlled films enable flat, crack-free membranes with diameters exceeding 1mm.
Final Passivation Layer
PECVD Si₃N₄ as the top-level hermetic passivation over completed ICs. Excellent Na⁺ and H₂O diffusion barrier protects underlying aluminum and copper metallization from corrosion and ionic contamination.
Hard Mask for Deep Etching
LPCVD Si₃N₄ hard mask for deep silicon etching (DRIE) and KOH/TMAH wet anisotropic etching. Etch selectivity of >1000:1 in KOH enables high-aspect-ratio structures for MEMS and 3D integration.
Diffusion Barrier
Dense LPCVD Si₃N₄ as a barrier against dopant diffusion, selective oxidation (LOCOS mask), and against mobile ion penetration (Na⁺, K⁺). Essential for reliable MOS device fabrication.
CMP Stop Layer
Si₃N₄ as a chemical-mechanical polishing stop in shallow trench isolation (STI) and damascene processes. High hardness and chemical resistance provide excellent polish selectivity against SiO₂ slurries.
Optical Waveguide Core
Stoichiometric Si₃N₄ as a low-loss waveguide core material for visible and near-IR photonic integrated circuits. Propagation loss < 0.1 dB/cm from 400nm to 1600nm with high Kerr nonlinearity.
Gate Dielectric (MIS/MNOS)
Ultra-thin Si₃N₄ as the charge-trapping layer in SONOS/MONOS non-volatile memory transistors and as a high-κ supplement in composite gate dielectric stacks for power devices.
Encapsulation & Barrier Coatings
Conformal PECVD Si₃N₄ encapsulation for optoelectronics (LEDs, laser facets), biomedical implant coatings, and anti-reflective coatings on solar cells. Excellent hermeticity with WVTR < 10⁻⁶ g/m²/day.
Technical Specifications
| Parameter | Available Range / Values |
|---|---|
| Si₃N₄ Thickness Range | 20nm – 2μm (LPCVD); 50nm – 5μm (PECVD, on request) |
| Thickness Uniformity | ±2% within-wafer (LPCVD, Std Dev); ±3% (PECVD) |
| Refractive Index (n) | 2.00 ± 0.02 at 632.8nm (stoichiometric LPCVD Si₃N₄) |
| Dielectric Breakdown Strength | >10 MV/cm (LPCVD stoichiometric, 25°C) |
| Film Stress (LPCVD stoich.) | < 100 MPa tensile (as-deposited); adjustable via Si-rich formulation |
| Film Stress (Low-Stress) | < 50 MPa tensile (Si-rich LPCVD SiN<sub>x</sub>, n ≈ 2.2–2.4) |
| Wafer Diameters | 100mm (4″), 150mm (6″), 200mm (8″), 300mm (12″) |
| Wafer Orientations | 〈100〉, 〈111〉, 〈110〉 (double-side or single-side deposition) |
| Deposition Methods | LPCVD (820°C, DCS/NH₃), PECVD (250–400°C, SiH₄/NH₃/N₂) |
| KOH Etch Selectivity | >1000:1 Si:Si₃N₄ in 30% KOH at 80°C (LPCVD nitride) |
| TMAH Etch Selectivity | >5000:1 Si:Si₃N₄ in 25% TMAH at 80°C (LPCVD nitride) |
Metrology & Quality Assurance
Silicon nitride film quality is verified through a comprehensive metrology protocol optimized for both LPCVD and PECVD films. Each lot ships with a full Certificate of Analysis.
Need Si₃N₄ Wafers for Your Process?
Specify your target Si₃N₄ thickness, deposition method (LPCVD or PECVD), stress requirements (stoichiometric or low-stress), wafer diameter, and quantity — our dielectric film specialists will provide a detailed quotation within 24 hours.