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Solder · Cu Pillar · Au StudStat Bump Tech
10μm–400μmPitch-Bereich
100mm–300mmWafer-Durchmesser
6 UBM StacksStat Ubm Stacks

Übersicht

Bumping ist die Schlüsseltechnologie für Flip-Chip und 3D.

Bumps: Lot, Cu-Pillars, Au. Pitch 130–10 μm. 200/300 mm.

Bumping-Technologien

Lot-Bumps (SnAg/Cu, SAC305)

Lot-Bumps 130–250 μm. SAC305, SnAg. RoHS.

SnAg (SAC305, SAC405)SnAgCu (LF solder)AuSn (eutectic, 80/20)SnPb (for MIL/aerospace)Pitch: 60μm–400μmBump height: 15μm–100μm

Cu-Pillar-Bumps

Cu-Pillars 40–80 μm. Höhe 20–60 μm. Für 3D.

Cu height: 10μm–80μmSolder cap: SnAg, SACPitch: 20μm–80μmAR up to 5:1Electromigration: 10× better vs solderNi barrier layer option

Au-Stud-Bumps

Au-Studs > 60 μm. Für Optoelektronik. < 150°C.

Au (99.99% purity)Diameter: 25μm–80μmHeight: 15μm–50μmFluxless — clean processCompliant interconnectIndividual die or full wafer

Micro-Bumps (Cu/SnAg, 10–55 μm)

Micro-Bumps 10–55 μm für 3D-IC. HBM, Chiplets.

Pitch: 10μm–55μmCu/Ni/SnAg micro-bumpsDiameter: 5μm–25μmHybrid bonding compatibleMass reflow or TCB bonding300mm wafer compatible

Heading Ubm Stacks

Under-Bump Metallization provides the adhesion, diffusion barrier, and solder-wetting layers required for reliable wafer bumping. We offer a range of UBM stacks optimized for different solder types, pitch requirements, and reliability profiles.

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Heading Process Flow

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Typische Anwendungen

Flip-Chip für Hochleistungs-ICs

Flip-Chip Cu-Pillars/Lot. L < 0,1 nH.

3D-IC-Speicher (HBM)

Micro-Bumps 10–40 μm für HBM. TSV-kompatibel.

CIS-Montage

Bumps für CIS. Niedertemperatur-Bonden.

HF- & mmWave-Bauelemente

Au-Studs und Cu-Pillars für HF/mmWave. Lpar < 0,05 nH.

LED- & Optoelektronik-Montage

Au-Bumps für LED- und Micro-LED-Displays.

Heading Reliability

Environmental reliability testing includes temperature cycling, HAST, high-temperature storage, and mechanical shock per MIL-STD and JEDEC standards. Bonded wafer pairs are qualified for your application-specific environmental conditions.

Heading QA

Our metrology laboratory maintains ISO 17025 accreditation with NIST-traceable reference standards. All measurement equipment undergoes daily calibration verification with certified reference wafers, and our measurement uncertainty is documented for each parameter type.

Wafer-Bumping nötig?

Geben Sie Bump-Typ, Pitch, UBM-Anforderungen an. Angebot innerhalb 24h.

ISO 9001 zertifiziert JEDEC-Zuverlässigkeit Meta Aoi RoHS-konform